From b4a6ca96c01e1312784a4c9b6961697e846b7b00 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Thu, 30 Apr 2015 11:38:13 +0200 Subject: imgtec/pistachio: Add comment on the unusual memory layout To avoid having to dig up the constraints again, document the memory layout right in memlayout.ld. Change-Id: I298cc880ae462f5b197ab2f64beb2f0e0d9f5a7d Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/10039 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/imgtec/pistachio/include/soc/memlayout.ld | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/soc/imgtec') diff --git a/src/soc/imgtec/pistachio/include/soc/memlayout.ld b/src/soc/imgtec/pistachio/include/soc/memlayout.ld index e9f6c592fe..bc6744741d 100644 --- a/src/soc/imgtec/pistachio/include/soc/memlayout.ld +++ b/src/soc/imgtec/pistachio/include/soc/memlayout.ld @@ -42,7 +42,10 @@ SECTIONS PRERAM_CBFS_CACHE(0x1a00e000, 72K) SRAM_END(0x1a020000) - /* Bootblock executes out of KSEG0 and sets up the identity mapping. */ + /* Bootblock executes out of KSEG0 and sets up the identity mapping. + * This is identical to SRAM above, and thus also limited 64K and + * needs to avoid conflicts with items set up above. + */ BOOTBLOCK(0x9a000000, 20K) /* -- cgit v1.2.3