From 99aa6ce053f5122a98713b8353de6b8a72182cad Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 24 Jun 2017 21:34:58 -0600 Subject: src/soc: add IS_ENABLED() around Kconfig symbol references MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I2e7b756296e861e08cea846297f687a880daaf45 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/20355 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/soc/dmp/vortex86ex/ide_sd_sata.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc/dmp/vortex86ex/ide_sd_sata.c') diff --git a/src/soc/dmp/vortex86ex/ide_sd_sata.c b/src/soc/dmp/vortex86ex/ide_sd_sata.c index 936505e436..c60018ab49 100644 --- a/src/soc/dmp/vortex86ex/ide_sd_sata.c +++ b/src/soc/dmp/vortex86ex/ide_sd_sata.c @@ -80,20 +80,20 @@ static void init_ide_ata_timing(struct device *dev) u16 ata_timing_pri, ata_timing_sec; u32 ata_timing_reg32; /* Primary channel is SD. */ -#if CONFIG_IDE1_ENABLE +#if IS_ENABLED(CONFIG_IDE1_ENABLE) ata_timing_pri = 0x8000; #else ata_timing_pri = 0x0000; // Disable this channel. #endif /* Secondary channel is SATA. */ -#if CONFIG_IDE2_ENABLE +#if IS_ENABLED(CONFIG_IDE2_ENABLE) ata_timing_sec = 0xa30f; // This setting value works well. #else ata_timing_sec = 0x0000; // Disable this channel. #endif ata_timing_reg32 = (ata_timing_sec << 16) | ata_timing_pri; pci_write_config32(dev, 0x40, ata_timing_reg32); -#if CONFIG_IDE_NATIVE_MODE +#if IS_ENABLED(CONFIG_IDE_NATIVE_MODE) /* Set both IDE channels to native mode. */ u8 prog_if; prog_if = pci_read_config8(dev, 0x09); @@ -110,7 +110,7 @@ static void init_ide_ata_timing(struct device *dev) static void setup_std_ide_compatible(struct device *dev) { -#if CONFIG_IDE_STANDARD_COMPATIBLE +#if IS_ENABLED(CONFIG_IDE_STANDARD_COMPATIBLE) // Misc Control Register (MCR) Offset 90h // bit 0 = Vendor ID Access, bit 1 = Device ID Access. u8 mcr; -- cgit v1.2.3