From d05f57cfcbf069e9635c671c1ae53fcfced0c3b7 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 23 Oct 2019 18:54:48 +0200 Subject: arch/arm64: Pass cbmem_top to ramstage via calling argument This solution is very generic and can in principle be implemented on all arch/soc. Currently the old infrastructure to pass on information from romstage to ramstage is left in place and will be removed in a follow-up commit. Nvidia Tegra will be handled in a separate patch because it has a custom ramstage entry. Instead trying to figure out which files can be removed from stages and which cbmem_top implementations need with preprocessor, rename all cbmem_top implementation to cbmem_top_romstage. Mechanisms set in place to pass on information from rom- to ram-stage will be replaced in a followup commit. Change-Id: I86cdc5c2fac76797732a3a3398f50c4d1ff6647a Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36275 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Julius Werner --- src/soc/cavium/cn81xx/Makefile.inc | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/soc/cavium/cn81xx') diff --git a/src/soc/cavium/cn81xx/Makefile.inc b/src/soc/cavium/cn81xx/Makefile.inc index 3a36bfa6c0..ece705fd92 100644 --- a/src/soc/cavium/cn81xx/Makefile.inc +++ b/src/soc/cavium/cn81xx/Makefile.inc @@ -35,7 +35,6 @@ verstage-y += gpio.c verstage-y += timer.c verstage-y += spi.c verstage-y += uart.c -verstage-y += cbmem.c ################################################################################ # romstage @@ -65,7 +64,6 @@ ramstage-y += soc.c ramstage-y += cpu.c ramstage-y += cpu_secondary.S ramstage-y += ecam0.c -ramstage-y += cbmem.c ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c -- cgit v1.2.3