From d0c6797e796af155cd435ed344958dbb9c418a86 Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Tue, 17 Apr 2018 13:47:55 +0200
Subject: soc/cavium: Add PCI support

* Add support for secure/unsecure split
* Use MMCONF to access devices in domain0
* Program MSIX vectors to fix a crash in GNU/Linux

Tested on Cavium CN81XX_EVB.

All PCI devices are visible.

Change-Id: I881f38a26a165e6bd965fcd73547473b5e32d4b0
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25750
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/cavium/cn81xx/soc.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

(limited to 'src/soc/cavium/cn81xx/soc.c')

diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c
index 6c68bb2fe5..5e540a6765 100644
--- a/src/soc/cavium/cn81xx/soc.c
+++ b/src/soc/cavium/cn81xx/soc.c
@@ -29,6 +29,7 @@
 #include <string.h>
 #include <symbols.h>
 #include <libbdk-boot/bdk-boot.h>
+#include <soc/ecam0.h>
 
 static void soc_read_resources(device_t dev)
 {
@@ -59,7 +60,12 @@ static struct device_operations soc_ops = {
 
 static void enable_soc_dev(device_t dev)
 {
-	dev->ops = &soc_ops;
+	if (dev->path.type == DEVICE_PATH_DOMAIN &&
+		dev->path.domain.domain == 0) {
+		dev->ops = &pci_domain_ops_ecam0;
+	} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
+		dev->ops = &soc_ops;
+	}
 }
 
 struct chip_operations soc_cavium_cn81xx_ops = {
-- 
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