From 88f81af1ef0d74ca2be865454cc801efe32a88af Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Wed, 11 Apr 2018 11:40:55 +0200 Subject: soc/cavium: Add secondary CPU support Change-Id: I07428161615bcd3d03a3eea0df2dd813e08c8f66 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/25752 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks --- src/soc/cavium/cn81xx/soc.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'src/soc/cavium/cn81xx/soc.c') diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c index 03f9122404..6c68bb2fe5 100644 --- a/src/soc/cavium/cn81xx/soc.c +++ b/src/soc/cavium/cn81xx/soc.c @@ -49,9 +49,12 @@ static void soc_final(device_t dev) } static struct device_operations soc_ops = { - .read_resources = soc_read_resources, - .init = soc_init, - .final = soc_final, + .read_resources = soc_read_resources, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .init = soc_init, + .final = soc_final, + .scan_bus = NULL, }; static void enable_soc_dev(device_t dev) -- cgit v1.2.3