From 99d39565da77056699ea011e82483092ec650153 Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Mon, 2 Mar 2015 14:38:37 -0800 Subject: google/purin: add DMA coherent region BUG=none BRANCH=broadcom-firmware TEST=boot to depthcharge Change-Id: Id10437c12e219e07121395abd442d53b3b56c7be Signed-off-by: Patrick Georgi Original-Commit-Id: f33e9218ca8df1d149761c09253c30837b607433 Original-Signed-off-by: Daisuke Nojiri Original-Reviewed-on: https://chrome-internal-review.googlesource.com/204757 Original-Reviewed-by: Julius Werner Original-Commit-Queue: Daisuke Nojiri Original-Tested-by: Daisuke Nojiri Original-Change-Id: I93def9c326cc8b4fea69078987bddf09d9f2a797 Original-Reviewed-on: https://chromium-review.googlesource.com/256417 Reviewed-on: http://review.coreboot.org/9854 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/broadcom/cygnus/Makefile.inc | 2 + src/soc/broadcom/cygnus/include/soc/memlayout.ld | 1 + src/soc/broadcom/cygnus/include/soc/sdram.h | 3 ++ src/soc/broadcom/cygnus/romstage.c | 8 ++-- src/soc/broadcom/cygnus/sdram.c | 5 +++ src/soc/broadcom/cygnus/soc.c | 51 ++++++++++++++++++++++++ 6 files changed, 67 insertions(+), 3 deletions(-) create mode 100644 src/soc/broadcom/cygnus/soc.c (limited to 'src/soc/broadcom/cygnus') diff --git a/src/soc/broadcom/cygnus/Makefile.inc b/src/soc/broadcom/cygnus/Makefile.inc index 6f0c584394..cac9062f76 100644 --- a/src/soc/broadcom/cygnus/Makefile.inc +++ b/src/soc/broadcom/cygnus/Makefile.inc @@ -47,6 +47,8 @@ romstage-y += timer.c ramstage-y += cbmem.c ramstage-y += i2c.c +ramstage-y += sdram.c +ramstage-y += soc.c ramstage-y += timer.c ramstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-$(CONFIG_DRIVERS_UART) += ns16550.c diff --git a/src/soc/broadcom/cygnus/include/soc/memlayout.ld b/src/soc/broadcom/cygnus/include/soc/memlayout.ld index 542174bf02..6342810929 100644 --- a/src/soc/broadcom/cygnus/include/soc/memlayout.ld +++ b/src/soc/broadcom/cygnus/include/soc/memlayout.ld @@ -42,4 +42,5 @@ SECTIONS DRAM_START(0x60000000) RAMSTAGE(0x60000000, 128K) POSTRAM_CBFS_CACHE(0x60100000, 1M) + DMA_COHERENT(0x60200000, 2M) } diff --git a/src/soc/broadcom/cygnus/include/soc/sdram.h b/src/soc/broadcom/cygnus/include/soc/sdram.h index 673d3d4f40..c7d6383e58 100644 --- a/src/soc/broadcom/cygnus/include/soc/sdram.h +++ b/src/soc/broadcom/cygnus/include/soc/sdram.h @@ -20,7 +20,10 @@ #ifndef __SOC_BROADCOM_CYGNUS_SDRAM_H__ #define __SOC_BROADCOM_CYGNUS_SDRAM_H__ +#include + void ddr_init2(void); void sdram_init(void); +uint32_t sdram_size_mb(void); #endif /* __SOC_BROADCOM_CYGNUS_SDRAM_H__ */ diff --git a/src/soc/broadcom/cygnus/romstage.c b/src/soc/broadcom/cygnus/romstage.c index e581a63356..f293f31d2a 100644 --- a/src/soc/broadcom/cygnus/romstage.c +++ b/src/soc/broadcom/cygnus/romstage.c @@ -55,9 +55,11 @@ void main(void) after_dram_time = timestamp_get(); #endif - mmu_init(); - mmu_config_range(0, 4096, DCACHE_OFF); - dcache_mmu_enable(); + /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ + mmu_config_range((uintptr_t)_dram/MiB, + sdram_size_mb(), DCACHE_WRITEBACK); + mmu_config_range((uintptr_t)_dma_coherent/MiB, + _dma_coherent_size/MiB, DCACHE_OFF); cbmem_initialize_empty(); diff --git a/src/soc/broadcom/cygnus/sdram.c b/src/soc/broadcom/cygnus/sdram.c index 1642842e0c..bab126d66c 100644 --- a/src/soc/broadcom/cygnus/sdram.c +++ b/src/soc/broadcom/cygnus/sdram.c @@ -60,3 +60,8 @@ void sdram_init(void) test_ddr(); } + +uint32_t sdram_size_mb(void) +{ + return CONFIG_DRAM_SIZE_MB; +} diff --git a/src/soc/broadcom/cygnus/soc.c b/src/soc/broadcom/cygnus/soc.c new file mode 100644 index 0000000000..c9597f2b08 --- /dev/null +++ b/src/soc/broadcom/cygnus/soc.c @@ -0,0 +1,51 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include + +static void soc_init(device_t dev) +{ + ram_resource(dev, 0, (uintptr_t)_dram/KiB, sdram_size_mb()*(MiB/KiB)); +} + +static void soc_noop(device_t dev) +{ +} + +static struct device_operations soc_ops = { + .read_resources = soc_noop, + .set_resources = soc_noop, + .enable_resources = soc_noop, + .init = soc_init, + .scan_bus = 0, +}; + +static void enable_cygnus_dev(device_t dev) +{ + dev->ops = &soc_ops; +} + +struct chip_operations soc_broadcom_cygnus_ops = { + CHIP_NAME("SOC Broadcom Cygnus") + .enable_dev = enable_cygnus_dev, +}; -- cgit v1.2.3