From fab6e44a95e8217818254d69de4ba648bfa9e8ed Mon Sep 17 00:00:00 2001 From: Kangheui Won Date: Mon, 18 Oct 2021 15:35:28 +1100 Subject: psp_verstage: convert relative address in EFS2 Addresses in AMD fw table with EFS gen2 are relative addresses, but PSP doesn't accept relative addresses in update_psp_bios_dir(). Check for EFS gen2 and convert them as needed. BUG=b:194263115 TEST=build and boot on guybrush and shuboz Signed-off-by: Kangheui Won Change-Id: I95813beba7278480e6640599fcf7445923259361 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58316 Tested-by: build bot (Jenkins) Reviewed-by: Karthik Ramasubramanian Reviewed-by: Felix Held --- src/soc/amd/cezanne/include/soc/iomap.h | 4 ++-- src/soc/amd/common/block/include/amdblocks/psp_efs.h | 2 ++ src/soc/amd/common/psp_verstage/psp_verstage.c | 7 +++++++ src/soc/amd/picasso/include/soc/iomap.h | 4 ++-- 4 files changed, 13 insertions(+), 4 deletions(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/cezanne/include/soc/iomap.h b/src/soc/amd/cezanne/include/soc/iomap.h index a4f0f30d80..f83f13aa2d 100644 --- a/src/soc/amd/cezanne/include/soc/iomap.h +++ b/src/soc/amd/cezanne/include/soc/iomap.h @@ -36,10 +36,10 @@ #define APU_EMMC_BASE 0xfedd5000 #define APU_EMMC_CONFIG_BASE 0xfedd5800 -#define FLASH_BASE_ADDR ((0xffffffff - CONFIG_ROM_SIZE) + 1) - #endif /* ENV_X86 */ +#define FLASH_BASE_ADDR ((0xffffffff - CONFIG_ROM_SIZE) + 1) + /* I/O Ranges */ #define ACPI_IO_BASE 0x0400 #define ACPI_PM_EVT_BLK (ACPI_IO_BASE + 0x00) diff --git a/src/soc/amd/common/block/include/amdblocks/psp_efs.h b/src/soc/amd/common/block/include/amdblocks/psp_efs.h index 1a6059a1be..a3996cbf3b 100644 --- a/src/soc/amd/common/block/include/amdblocks/psp_efs.h +++ b/src/soc/amd/common/block/include/amdblocks/psp_efs.h @@ -29,6 +29,8 @@ struct second_gen_efs { /* todo: expand for Server products */ uint32_t reserved:31; } __attribute__((packed)); +#define EFS_SECOND_GEN 0 + /* Copied from coreboot/util/amdfwtool.h */ struct embedded_firmware { uint32_t signature; /* 0x55aa55aa */ diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c index c03cf9b22e..9f27159d69 100644 --- a/src/soc/amd/common/psp_verstage/psp_verstage.c +++ b/src/soc/amd/common/psp_verstage/psp_verstage.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -121,6 +122,12 @@ static uint32_t update_boot_region(struct vb2_context *ctx) return POSTCODE_BDT1_COOKIE_MISMATCH_ERROR; } + /* EFS2 uses relative address and PSP isn't happy with that */ + if (ef_table->efs_gen.gen == EFS_SECOND_GEN) { + psp_dir_addr = FLASH_BASE_ADDR + (psp_dir_addr & SPI_ADDR_MASK); + bios_dir_addr = FLASH_BASE_ADDR + (bios_dir_addr & SPI_ADDR_MASK); + } + if (update_psp_bios_dir(&psp_dir_addr, &bios_dir_addr)) { printk(BIOS_ERR, "Error: Updated BIOS Directory could not be set.\n"); return POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR; diff --git a/src/soc/amd/picasso/include/soc/iomap.h b/src/soc/amd/picasso/include/soc/iomap.h index 1577568c90..93f2874fe0 100644 --- a/src/soc/amd/picasso/include/soc/iomap.h +++ b/src/soc/amd/picasso/include/soc/iomap.h @@ -61,10 +61,10 @@ #define APU_EMMC_BASE 0xfedd5000 #define APU_EMMC_CONFIG_BASE 0xfedd5800 -#define FLASH_BASE_ADDR ((0xffffffff - CONFIG_ROM_SIZE) + 1) - #endif /* ENV_X86 */ +#define FLASH_BASE_ADDR ((0xffffffff - CONFIG_ROM_SIZE) + 1) + /* I/O Ranges */ #define ACPI_IO_BASE 0x400 #define ACPI_PM_EVT_BLK (ACPI_IO_BASE + 0x00) /* 4 bytes */ -- cgit v1.2.3