From ce0fad5e39c7d5b32ea39f2bb56b1f2b26de89f8 Mon Sep 17 00:00:00 2001 From: Kangheui Won Date: Fri, 25 Jun 2021 16:03:05 +1000 Subject: soc/amd/cezanne: enable crypto in psp_verstage Enable RSA and SHA for cezanne since support has been added to the PSP. Also picasso and cezanne have different enums definitions for hash algorithm, so split that out into chipset.c. BUG=b:187906425 TEST=boot guybrush, check cbmem -t and the logs Signed-off-by: Kangheui Won Change-Id: I725b0cac801ac0429f362a83aa58a8b9de158550 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55833 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/soc/amd/cezanne/psp_verstage/chipset.c | 21 +++++++++++++++------ src/soc/amd/cezanne/psp_verstage/svc.c | 14 ++++++++++++++ src/soc/amd/common/psp_verstage/Makefile.inc | 3 --- .../amd/common/psp_verstage/include/psp_verstage.h | 4 ++++ src/soc/amd/common/psp_verstage/vboot_crypto.c | 8 +------- src/soc/amd/picasso/psp_verstage/chipset.c | 15 +++++++++++++++ 6 files changed, 49 insertions(+), 16 deletions(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/cezanne/psp_verstage/chipset.c b/src/soc/amd/cezanne/psp_verstage/chipset.c index 7ad21490f8..f680456b1a 100644 --- a/src/soc/amd/cezanne/psp_verstage/chipset.c +++ b/src/soc/amd/cezanne/psp_verstage/chipset.c @@ -1,12 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* This file contains stub for not-yet-implemented svc in cezanne PSP. - * So this file will and should be removed eventually when psp_verstage works - * correctly in cezanne. - */ - #include -#include #include uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) @@ -24,6 +18,21 @@ uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table) return ef_table->bios3_entry; } +int platform_set_sha_op(enum vb2_hash_algorithm hash_alg, + struct sha_generic_data *sha_op) +{ + if (hash_alg == VB2_HASH_SHA256) { + sha_op->SHAType = SHA_TYPE_256; + sha_op->DigestLen = 32; + } else if (hash_alg == VB2_HASH_SHA384) { + sha_op->SHAType = SHA_TYPE_384; + sha_op->DigestLen = 48; + } else { + return -1; + } + return 0; +} + /* Functions below are stub functions for not-yet-implemented PSP features. * These functions should be replaced with proper implementations later. diff --git a/src/soc/amd/cezanne/psp_verstage/svc.c b/src/soc/amd/cezanne/psp_verstage/svc.c index bd4bec5798..e0f1b52d60 100644 --- a/src/soc/amd/cezanne/psp_verstage/svc.c +++ b/src/soc/amd/cezanne/psp_verstage/svc.c @@ -112,3 +112,17 @@ uint32_t svc_reset_system(enum reset_type reset_type) SVC_CALL1(SVC_RESET_SYSTEM, reset_type, retval); return retval; } + +uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode) +{ + uint32_t retval = 0; + SVC_CALL2(SVC_SHA, sha_op, sha_mode, retval); + return retval; +} + +uint32_t svc_modexp(struct mod_exp_params *mod_exp_param) +{ + uint32_t retval = 0; + SVC_CALL1(SVC_MODEXP, mod_exp_param, retval); + return retval; +} diff --git a/src/soc/amd/common/psp_verstage/Makefile.inc b/src/soc/amd/common/psp_verstage/Makefile.inc index 678bc45f0f..a913a5ba56 100644 --- a/src/soc/amd/common/psp_verstage/Makefile.inc +++ b/src/soc/amd/common/psp_verstage/Makefile.inc @@ -16,10 +16,7 @@ verstage-y += psp_verstage.c verstage-y += psp.c verstage-y += reset.c verstage-y += timer.c -ifneq ($(CONFIG_SOC_AMD_CEZANNE),y) -# cezanne PSP does not support these functions yet (b/187906425) verstage-y += vboot_crypto.c -endif $(obj)/psp_verstage.bin: $(objcbfs)/verstage.elf $(OBJCOPY_verstage) -O binary $^ $@ diff --git a/src/soc/amd/common/psp_verstage/include/psp_verstage.h b/src/soc/amd/common/psp_verstage/include/psp_verstage.h index 7bfc8b77ee..be6b23dfdd 100644 --- a/src/soc/amd/common/psp_verstage/include/psp_verstage.h +++ b/src/soc/amd/common/psp_verstage/include/psp_verstage.h @@ -3,6 +3,8 @@ #ifndef PSP_VERSTAGE_H #define PSP_VERSTAGE_H +#include <2crypto.h> +#include #include #include @@ -62,5 +64,7 @@ uint32_t get_max_workbuf_size(uint32_t *size); uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset); uint32_t save_uapp_data(void *address, uint32_t size); uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table); +int platform_set_sha_op(enum vb2_hash_algorithm hash_alg, + struct sha_generic_data *sha_op); #endif /* PSP_VERSTAGE_H */ diff --git a/src/soc/amd/common/psp_verstage/vboot_crypto.c b/src/soc/amd/common/psp_verstage/vboot_crypto.c index 3f7151ac11..581d92485f 100644 --- a/src/soc/amd/common/psp_verstage/vboot_crypto.c +++ b/src/soc/amd/common/psp_verstage/vboot_crypto.c @@ -21,13 +21,7 @@ vb2_error_t vb2ex_hwcrypto_digest_init(enum vb2_hash_algorithm hash_alg, uint32_ sha_op_size_remaining = data_size; - if (hash_alg == VB2_HASH_SHA256) { - sha_op.SHAType = SHA_TYPE_256; - sha_op.DigestLen = 32; - } else if (hash_alg == VB2_HASH_SHA512) { - sha_op.SHAType = SHA_TYPE_512; - sha_op.DigestLen = 64; - } else { + if (platform_set_sha_op(hash_alg, &sha_op) != 0) { printk(BIOS_INFO, "Unsupported hash_alg %d!\n", hash_alg); return VB2_ERROR_EX_HWCRYPTO_UNSUPPORTED; } diff --git a/src/soc/amd/picasso/psp_verstage/chipset.c b/src/soc/amd/picasso/psp_verstage/chipset.c index b7acbcd282..83f956b236 100644 --- a/src/soc/amd/picasso/psp_verstage/chipset.c +++ b/src/soc/amd/picasso/psp_verstage/chipset.c @@ -23,3 +23,18 @@ uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table) { return ef_table->bios1_entry; } + +int platform_set_sha_op(enum vb2_hash_algorithm hash_alg, + struct sha_generic_data *sha_op) +{ + if (hash_alg == VB2_HASH_SHA256) { + sha_op->SHAType = SHA_TYPE_256; + sha_op->DigestLen = 32; + } else if (hash_alg == VB2_HASH_SHA512) { + sha_op->SHAType = SHA_TYPE_512; + sha_op->DigestLen = 64; + } else { + return -1; + } + return 0; +} -- cgit v1.2.3