From c4f735105bb4d81eb8a8365bf7ac480676f47608 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 9 Jul 2024 16:54:51 -0500 Subject: soc/amd/phoenix: Fix APOB NV size/base for non-vboot builds The APOB NV size/base are embedded into the amdfw binary and read by the PSP. These need to be synchronized with the FMAP region used by coreboot to store the APOB data. soc_update_apob_cache() will only use RECOVERY_MRC_CACHE if supported and if vboot is enabled, so the NV base passed to the PSP needs to reflect that as well. This fixes the issue of RAM training running on every boot on non-vboot builds for Myst boards. TEST=untested, but same change as made for Mendocino Change-Id: Ib4a78a39badf0a067e22eebe5869e5ea51723f35 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/83401 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth Reviewed-by: Fred Reitberger --- src/soc/amd/phoenix/Makefile.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/phoenix/Makefile.mk b/src/soc/amd/phoenix/Makefile.mk index be0a02296f..03edd43db5 100644 --- a/src/soc/amd/phoenix/Makefile.mk +++ b/src/soc/amd/phoenix/Makefile.mk @@ -130,7 +130,7 @@ APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE) APOB_NV_BASE=$(call _tohex,$(call int-subtract, \ $(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START) $(FMAP_FLASH_START))) -ifeq ($(CONFIG_HAS_RECOVERY_MRC_CACHE),y) +ifeq ($(CONFIG_HAS_RECOVERY_MRC_CACHE)$(CONFIG_VBOOT),yy) # On boards with recovery MRC cache, point type 0x63 entry to RECOVERY_MRC_CACHE. # Else use RW_MRC_CACHE. This entry will be added in the RO section. APOB_NV_RO_SIZE=$(call get_fmap_value,FMAP_SECTION_RECOVERY_MRC_CACHE_SIZE) -- cgit v1.2.3