From ba4dbf8c4ce30da00bc933375d77c4235caccbff Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sat, 16 Jan 2021 15:02:17 +0100 Subject: soc/amd/stoneyridge/romstage.c: Remove repeated word Change-Id: I38974b532f41830f49b54444d98e6bd7aa417aba Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/49533 Tested-by: build bot (Jenkins) Reviewed-by: Jacob Garber --- src/soc/amd/stoneyridge/romstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index 96103efd87..49279028b6 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -80,7 +80,7 @@ asmlinkage void car_stage_entry(void) * * After setting up DRAM, AGESA also completes the configuration * of the MTRRs, setting regions to WB. Anything written to - * memory between now and and when CAR is dismantled will be + * memory between now and when CAR is dismantled will be * in cache and lost. For now, set the regions UC to ensure * the writes get to DRAM. */ -- cgit v1.2.3