From b5e72b65a79a4bb019dfd9bde65b159f6813f9fa Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 2 Jan 2018 23:41:24 +0100 Subject: soc/amd/stoneyridge: Define CONSOLE_UART_BASE_ADDRESS The build system for the SeaBIOS payload needs this when DRIVERS_UART_8250MEM is set. Set it to the first uart controller, which the coreboot code also seems to do. Fixes: https://ticket.coreboot.org/issues/150 Change-Id: I962f750f89e0352082e0b7415ceaa9bd350fdf0b Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/23065 Tested-by: build bot (Jenkins) Reviewed-by: Richard Spiegel Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/soc/amd') diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index adfb3d21d7..51573fe34f 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -284,6 +284,11 @@ config STONEYRIDGE_UART to FEDC_6FFFh. UART controller 1 registers range from FEDC_8000h to FEDC_8FFFh. +config CONSOLE_UART_BASE_ADDRESS + depends on CONSOLE_SERIAL + hex + default 0xfedc6000 + config SMM_TSEG_SIZE hex default 0x800000 if SMM_TSEG && HAVE_SMI_HANDLER -- cgit v1.2.3