From b455dd3486a7b2e0b8d98c907cb9389c8283faff Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 9 Nov 2021 00:16:19 +0100 Subject: soc/amd/cezanne,picasso/include/southbridge: fix typo in define In both the Picasso PPR (rev 3.16) and the Cezanne PPR (rev 3.03) bit 16 of the misc I2C pad control registers is defined as BiasCrtEn, so rename I2C_PAD_CTRL_BIOS_CRT_EN to I2C_PAD_CTRL_BIAS_CRT_EN. Signed-off-by: Felix Held Change-Id: If39ac17a433cb90c944fdde038cd246a995e193a Reviewed-on: https://review.coreboot.org/c/coreboot/+/59028 Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) --- src/soc/amd/cezanne/include/soc/southbridge.h | 2 +- src/soc/amd/picasso/include/soc/southbridge.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h index addb850621..1e3697bd59 100644 --- a/src/soc/amd/cezanne/include/soc/southbridge.h +++ b/src/soc/amd/cezanne/include/soc/southbridge.h @@ -118,7 +118,7 @@ #define I2C_PAD_CTRL_CAP_UP BIT(13) #define I2C_PAD_CTRL_RES_DOWN BIT(14) #define I2C_PAD_CTRL_RES_UP BIT(15) -#define I2C_PAD_CTRL_BIOS_CRT_EN BIT(16) +#define I2C_PAD_CTRL_BIAS_CRT_EN BIT(16) #define I2C_PAD_CTRL_SPARE0 BIT(17) #define I2C_PAD_CTRL_SPARE1 BIT(18) diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h index f547f860a8..300f458fa7 100644 --- a/src/soc/amd/picasso/include/soc/southbridge.h +++ b/src/soc/amd/picasso/include/soc/southbridge.h @@ -115,7 +115,7 @@ #define I2C_PAD_CTRL_CAP_UP BIT(13) #define I2C_PAD_CTRL_RES_DOWN BIT(14) #define I2C_PAD_CTRL_RES_UP BIT(15) -#define I2C_PAD_CTRL_BIOS_CRT_EN BIT(16) +#define I2C_PAD_CTRL_BIAS_CRT_EN BIT(16) #define I2C_PAD_CTRL_SPARE0 BIT(17) #define I2C_PAD_CTRL_SPARE1 BIT(18) -- cgit v1.2.3