From 9db39879a8b45558db267614dc42eb6bf3d8fd58 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 13 Dec 2019 18:11:05 +0200 Subject: soc/amd,{agesa,pi}/hudson: Have do_board_reset in all stages MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I38a721c359ab7761c5a3ea79da0c159fd7f58970 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/37711 Reviewed-by: Mike Banon Reviewed-by: Marshall Dawson Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/Makefile.inc | 5 ++--- src/soc/amd/stoneyridge/Makefile.inc | 6 ++---- 2 files changed, 4 insertions(+), 7 deletions(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 76a4d70a8a..4492653713 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -41,7 +41,6 @@ romstage-y += i2c.c romstage-y += romstage.c romstage-y += gpio.c romstage-y += pmutil.c -romstage-y += reset.c romstage-y += smbus.c romstage-y += memmap.c romstage-$(CONFIG_PICASSO_UART) += uart.c @@ -52,7 +51,6 @@ romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c verstage-y += gpio.c verstage-y += i2c.c verstage-y += pmutil.c -verstage-y += reset.c verstage-$(CONFIG_PICASSO_UART) += uart.c verstage-y += tsc_freq.c @@ -71,7 +69,6 @@ ramstage-y += gpio.c ramstage-y += southbridge.c ramstage-y += northbridge.c ramstage-y += pmutil.c -ramstage-y += reset.c ramstage-y += acp.c ramstage-y += sata.c ramstage-y += sm.c @@ -84,6 +81,8 @@ ramstage-y += usb.c ramstage-y += tsc_freq.c ramstage-y += finalize.c +all-y += reset.c + smm-y += smihandler.c smm-y += smi_util.c smm-y += tsc_freq.c diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 15216b7934..e6cfa12ac4 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -45,7 +45,6 @@ bootblock-y += i2c.c bootblock-y += enable_usbdebug.c bootblock-y += monotonic_timer.c bootblock-y += pmutil.c -bootblock-y += reset.c bootblock-y += tsc_freq.c bootblock-y += southbridge.c bootblock-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c @@ -57,7 +56,6 @@ romstage-y += enable_usbdebug.c romstage-y += gpio.c romstage-y += monotonic_timer.c romstage-y += pmutil.c -romstage-y += reset.c romstage-y += smbus.c romstage-y += smbus_spd.c romstage-y += memmap.c @@ -70,7 +68,6 @@ verstage-y += gpio.c verstage-y += i2c.c verstage-y += monotonic_timer.c verstage-y += pmutil.c -verstage-y += reset.c verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c verstage-y += tsc_freq.c @@ -92,7 +89,6 @@ ramstage-y += monotonic_timer.c ramstage-y += southbridge.c ramstage-y += northbridge.c ramstage-y += pmutil.c -ramstage-y += reset.c ramstage-y += sata.c ramstage-y += sm.c ramstage-y += smbus.c @@ -104,6 +100,8 @@ ramstage-y += usb.c ramstage-y += tsc_freq.c ramstage-y += finalize.c +all-y += reset.c + smm-y += monotonic_timer.c smm-y += smihandler.c smm-y += smi_util.c -- cgit v1.2.3