From 7866166fb4e841f69e0ee73c6e7b2f4ed2ffd542 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Mon, 12 Jun 2023 17:11:14 +0200 Subject: soc/amd/common/cpu/noncar/cpu: rename get_smee_reserved_address_bits Rename get_smee_reserved_address_bits to get_sme_reserved_address_bits since the feature is called secure memory encryption and the last 'e' in SMEE bit in the SYSCFG MSR just stands for enable. The function will return a valid number of reserved address bits no matter if this is enabled or not, so drop the second 'e'. Signed-off-by: Felix Held Change-Id: I3795f7a861e39cb6c8209fee10191f233cbcd308 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75766 Tested-by: build bot (Jenkins) Reviewed-by: Fred Reitberger --- src/soc/amd/common/block/cpu/noncar/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/common/block/cpu/noncar/cpu.c b/src/soc/amd/common/block/cpu/noncar/cpu.c index 891dece7dd..eec593c8a9 100644 --- a/src/soc/amd/common/block/cpu/noncar/cpu.c +++ b/src/soc/amd/common/block/cpu/noncar/cpu.c @@ -35,7 +35,7 @@ void set_cstate_io_addr(void) wrmsr(MSR_CSTATE_ADDRESS, cst_addr); } -static uint32_t get_smee_reserved_address_bits(void) +static uint32_t get_sme_reserved_address_bits(void) { if (rdmsr(SYSCFG_MSR).raw & SYSCFG_MSR_SMEE) return (cpuid_ebx(CPUID_EBX_MEM_ENCRYPT) & @@ -47,5 +47,5 @@ static uint32_t get_smee_reserved_address_bits(void) uint32_t get_usable_physical_address_bits(void) { - return cpu_phys_address_size() - get_smee_reserved_address_bits(); + return cpu_phys_address_size() - get_sme_reserved_address_bits(); } -- cgit v1.2.3