From 68a1cb58c0a751803c31897526c3efc5b4835f13 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Mon, 25 Jan 2021 18:41:35 +0100 Subject: soc/amd/common/block/smbus: remove stale comment The comment doesn't apply to Stoneyridge, Picasso and Cezanne which are the only SoCs selecting SOC_AMD_COMMON_BLOCK_SMBUS. Signed-off-by: Felix Held Change-Id: I9024de9d3731a0bc64365f959142bf657a53e193 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49908 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/amd/common/block/smbus/sm.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/common/block/smbus/sm.c b/src/soc/amd/common/block/smbus/sm.c index 80a11848f5..1ec2730561 100644 --- a/src/soc/amd/common/block/smbus/sm.c +++ b/src/soc/amd/common/block/smbus/sm.c @@ -9,11 +9,6 @@ #include #include -/* -* The southbridge enables all USB controllers by default in SMBUS Control. -* The southbridge enables SATA by default in SMBUS Control. -*/ - static void sm_init(struct device *dev) { setup_ioapic(VIO_APIC_VADDR, CONFIG_MAX_CPUS); -- cgit v1.2.3