From 66c6413c69abb7335efc4ea07f4c811c042704b6 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 19 Dec 2020 16:19:44 +0200 Subject: ACPI: Refactor ChromeOS specific ACPI GNVS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The layout of GNVS has expectation for a fixed size array for chromeos_acpi_t. This allows us to reduce the exposure of . If chromeos_acpi_t was the last entry in struct global_nvs padding at the end is also removed. If device_nvs_t exists, place a properly sized reserve for chromeos_acpi_t in the middle. Allocation from cbmem is adjusted such that it matches exactly the OperationRegion size defined inside the ASL. Change-Id: If234075e11335ce958ce136dd3fe162f7e5afdf7 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/48788 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/amd/picasso/include/soc/nvs.h | 8 -------- src/soc/amd/stoneyridge/include/soc/nvs.h | 8 -------- 2 files changed, 16 deletions(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/picasso/include/soc/nvs.h b/src/soc/amd/picasso/include/soc/nvs.h index d5624d4d75..f10fbdde58 100644 --- a/src/soc/amd/picasso/include/soc/nvs.h +++ b/src/soc/amd/picasso/include/soc/nvs.h @@ -9,9 +9,7 @@ #ifndef AMD_PICASSO_NVS_H #define AMD_PICASSO_NVS_H -#include #include -#include #include struct __packed global_nvs { @@ -25,12 +23,6 @@ struct __packed global_nvs { uint8_t tmps; /* 0x17 - Temperature Sensor ID */ uint8_t tcrt; /* 0x18 - Critical Threshold */ uint8_t tpsv; /* 0x19 - Passive Threshold */ - uint8_t unused[230]; - - /* ChromeOS specific (0x100 - 0xfff) */ - chromeos_acpi_t chromeos; }; -check_member(global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); - #endif /* AMD_PICASSO_NVS_H */ diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h index 9c479c6e62..e4a158c7cb 100644 --- a/src/soc/amd/stoneyridge/include/soc/nvs.h +++ b/src/soc/amd/stoneyridge/include/soc/nvs.h @@ -9,9 +9,7 @@ #ifndef __SOC_STONEYRIDGE_NVS_H__ #define __SOC_STONEYRIDGE_NVS_H__ -#include #include -#include #include struct __packed global_nvs { @@ -32,12 +30,6 @@ struct __packed global_nvs { uint32_t fw01; /* 0x28 - XhciFwRamAddr_Rom, Boot RAM sz/base */ uint32_t fw03; /* 0x2c - XhciFwRomAddr_Ram, Instr RAM sz/base */ uint32_t eh10; /* 0x30 - EHCI BAR */ - uint8_t unused[204]; - - /* ChromeOS specific (0x100 - 0xfff) */ - chromeos_acpi_t chromeos; }; -check_member(global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); - #endif /* __SOC_STONEYRIDGE_NVS_H__ */ -- cgit v1.2.3