From 5e2e74f981ec444d326e8fa4c79396bc428ac528 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Fri, 10 Nov 2017 09:59:56 -0700 Subject: amd/stoneyridge: Replace BIT(n) in southbridge MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use more descriptive #define values for the ACPI features and register decoding. Change-Id: Iaaf9f9bd5761001bc4bfe6b64a6c72b1f04844bd Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/22427 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Paul Menzel --- src/soc/amd/stoneyridge/southbridge.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 0d96b5f773..6ab06780c8 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -61,10 +61,11 @@ static void sb_init_acpi_ports(void) pm_write16(PM_ACPI_SMI_CMD, 0); } - /* AcpiDecodeEnable, When set, SB uses the contents of the PM registers - * at index 60-6B to decode ACPI I/O address. AcpiSmiEn & SmiCmdEn - */ - pm_write8(PM_ACPI_CONF, BIT(0) | BIT(1) | BIT(4) | BIT(2)); + /* Decode ACPI registers and enable standard features */ + pm_write8(PM_ACPI_CONF, PM_ACPI_DECODE_STD | + PM_ACPI_GLOBAL_EN | + PM_ACPI_RTC_EN_EN | + PM_ACPI_TIMER_EN_EN); } void southbridge_init(void *chip_info) -- cgit v1.2.3