From 56d2a9766507f88dec5176a3ef3f05dea44390aa Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 22 Mar 2023 23:51:46 +0100 Subject: soc/amd/common/block/acpi/cpu_power_state: use pstate_msr union Use the pstate_msr union in get_pstate_info to check if the P state enable bit is set. Also drop the now unused PSTATE_DEF_HI_ENABLE_SHIFT and PSTATE_DEF_HI_ENABLE_MASK definitions. Signed-off-by: Felix Held Change-Id: I79119e09af79a4bb680a18e93b4a61a049f0080e Reviewed-on: https://review.coreboot.org/c/coreboot/+/73925 Tested-by: build bot (Jenkins) Reviewed-by: Fred Reitberger Reviewed-by: Matt DeVillier --- src/soc/amd/common/block/acpi/cpu_power_state.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/common/block/acpi/cpu_power_state.c b/src/soc/amd/common/block/acpi/cpu_power_state.c index 24b08f054a..617c399553 100644 --- a/src/soc/amd/common/block/acpi/cpu_power_state.c +++ b/src/soc/amd/common/block/acpi/cpu_power_state.c @@ -7,6 +7,7 @@ #include #include #include +#include #include /* @@ -16,8 +17,9 @@ static size_t get_pstate_info(struct acpi_sw_pstate *pstate_values, struct acpi_xpss_sw_pstate *pstate_xpss_values) { msr_t pstate_def; + union pstate_msr pstate_reg; size_t pstate_count, pstate; - uint32_t pstate_enable, max_pstate; + uint32_t max_pstate; pstate_count = 0; max_pstate = (rdmsr(PS_LIM_REG).lo & PS_LIM_MAX_VAL_MASK) >> PS_MAX_VAL_SHFT; @@ -25,9 +27,9 @@ static size_t get_pstate_info(struct acpi_sw_pstate *pstate_values, for (pstate = 0; pstate <= max_pstate; pstate++) { pstate_def = rdmsr(PSTATE_MSR(pstate)); - pstate_enable = (pstate_def.hi & PSTATE_DEF_HI_ENABLE_MASK) - >> PSTATE_DEF_HI_ENABLE_SHIFT; - if (!pstate_enable) + pstate_reg.raw = pstate_def.raw; + + if (!pstate_reg.pstate_en) continue; pstate_values[pstate_count].core_freq = get_pstate_core_freq(pstate_def); -- cgit v1.2.3