From 54888e8d7d949a56d9f1ec8e47cabd7c399ebbc1 Mon Sep 17 00:00:00 2001 From: Karthikeyan Ramasubramanian Date: Fri, 16 Apr 2021 11:24:33 -0600 Subject: Revert "soc/amd/cezanne: Add support to perform early EC sync" This reverts commit ad7c33abd21dfdde75c6ffa23c31cbe46826d2d5. With EFS2 already enabled in EC, enabling early EC sync is not required. Also a workaround has been added in payload to address any boot issues. BUG=b:185277224 TEST=Build and boot to OS in Guybrush in both normal and recovery mode. Cq-Depend: chromium:2832032 Signed-off-by: Karthikeyan Ramasubramanian Change-Id: I34f8433739754365c8e5a10fdf7e58e3d1e7e797 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52419 Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) --- src/soc/amd/cezanne/romstage.c | 4 ---- 1 file changed, 4 deletions(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/cezanne/romstage.c b/src/soc/amd/cezanne/romstage.c index 573b353c79..d3e1bd7a65 100644 --- a/src/soc/amd/cezanne/romstage.c +++ b/src/soc/amd/cezanne/romstage.c @@ -9,16 +9,12 @@ #include #include #include -#include asmlinkage void car_stage_entry(void) { post_code(0x40); console_init(); - if (CONFIG(VBOOT_EARLY_EC_SYNC)) - vboot_sync_ec(); - post_code(0x41); /* Snapshot chipset state prior to any FSP call */ -- cgit v1.2.3