From 498de91e459bc5122fb72d2a486e1d74d17eaac5 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Tue, 16 Jul 2019 12:56:03 -0600 Subject: soc/amd/picasso: Enable stage cache only with ACPI resume Make the option match the change in I7c3b3ec. "stoneyridge/Kconfig: Enable stage cache based on HAVE_ACPI_RESUME" Change-Id: I7fa13428ec0119b61f429116a52986067e833bdf Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/c/coreboot/+/34418 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/amd/picasso/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index d654e9494e..d6445c7cb2 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -52,7 +52,7 @@ config CPU_SPECIFIC_OPTIONS select C_ENVIRONMENT_BOOTBLOCK select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM + select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if HAVE_ACPI_RESUME select PARALLEL_MP select PARALLEL_MP_AP_WORK select HAVE_SMI_HANDLER -- cgit v1.2.3