From 3db7b46804fd69cd7443e4c007248c4acff9f97a Mon Sep 17 00:00:00 2001
From: Robert Zieba <robertzieba@google.com>
Date: Fri, 18 Nov 2022 18:28:55 +0000
Subject: soc/amd/cezanne: Update XHCI GPE to use constant

The GPE number used for XHCI has now been defined in AMD's common code
in CB:67936. Change over existing code to use this new definition.

BRANCH=guybrush
BUG=b:186792595
TEST=Ran on nipperkin device and verified that XHCI events string use
GPE 31.

Signed-off-by: Robert Zieba <robertzieba@google.com>
Change-Id: I9c2a44f7d2eb47422ae8c585e5e01ea0b420d461
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69917
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/amd/cezanne/xhci.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

(limited to 'src/soc/amd')

diff --git a/src/soc/amd/cezanne/xhci.c b/src/soc/amd/cezanne/xhci.c
index f599007b17..b0205c6e2a 100644
--- a/src/soc/amd/cezanne/xhci.c
+++ b/src/soc/amd/cezanne/xhci.c
@@ -2,6 +2,7 @@
 
 #include <amdblocks/gpio.h>
 #include <amdblocks/smi.h>
+#include <amdblocks/xhci.h>
 #include <bootstate.h>
 #include <device/device.h>
 #include <drivers/usb/pci_xhci/pci_xhci.h>
@@ -11,13 +12,13 @@
 static const struct sci_source xhci_sci_sources[] = {
 	{
 		.scimap = SMITYPE_XHC0_PME,
-		.gpe = GEVENT_31,
+		.gpe = XHCI_GEVENT,
 		.direction = SMI_SCI_LVL_HIGH,
 		.level = SMI_SCI_EDG
 	},
 	{
 		.scimap = SMITYPE_XHC1_PME,
-		.gpe = GEVENT_31,
+		.gpe = XHCI_GEVENT,
 		.direction = SMI_SCI_LVL_HIGH,
 		.level = SMI_SCI_EDG
 	}
-- 
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