From 2e785705f2c3bec3269ef313e7705d79b93b4ae1 Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Thu, 29 Sep 2022 16:17:53 +0200
Subject: soc/amd/common/psp_verstage/fch: use [read,write]8p to avoid
 typecasts

Also add missing device/mmio.h include.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I03af0772c735cdc7a4e221770dc528724baa7523
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67983
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
---
 src/soc/amd/common/psp_verstage/fch.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

(limited to 'src/soc/amd')

diff --git a/src/soc/amd/common/psp_verstage/fch.c b/src/soc/amd/common/psp_verstage/fch.c
index fca4c9a0af..d4dcd21b31 100644
--- a/src/soc/amd/common/psp_verstage/fch.c
+++ b/src/soc/amd/common/psp_verstage/fch.c
@@ -12,6 +12,7 @@
 #include <bl_uapp/bl_errorcodes_public.h>
 #include <bl_uapp/bl_syscall_public.h>
 #include <console/console.h>
+#include <device/mmio.h>
 #include <soc/i2c.h>
 #include <soc/southbridge.h>
 #include <stdint.h>
@@ -55,12 +56,12 @@ static void io_set_bar(void *bar)
 
 u8 io_read8(u16 reg)
 {
-	return read8((void *)(io_bar + reg));
+	return read8p(io_bar + reg);
 }
 
 void io_write8(u16 reg, u8 value)
 {
-	write8((void *)(io_bar + reg), value);
+	write8p(io_bar + reg, value);
 }
 
 static void aoac_set_bar(void *bar)
-- 
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