From 2d9e96a5ab175e126929e8d2314227cdd441857f Mon Sep 17 00:00:00 2001 From: Jan Dabros Date: Thu, 15 Sep 2022 07:36:43 +0000 Subject: soc/amd/mendocino/acpi: Add support for shared TPM_I2C controller There are platforms equipped with AMD SoC where I2C3 controller connected to TPM device is shared between X86 and PSP. In order to handle this, PSP acts as an I2C-arbitrator, where x86 (kernel) sends acquire and release requests to be accepted by PSP. Introduce new CONFIG for Mendocino SoCs similar to what we have for Cezanne. BUG=b:241878652 BRANCH=none Signed-off-by: Jan Dabros Change-Id: I015a24715271d2b26c0bd3c9425e20fb2987a954 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67674 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/soc/amd/mendocino/acpi/mmio.asl | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc/amd') diff --git a/src/soc/amd/mendocino/acpi/mmio.asl b/src/soc/amd/mendocino/acpi/mmio.asl index 48ae1d2773..5544016666 100644 --- a/src/soc/amd/mendocino/acpi/mmio.asl +++ b/src/soc/amd/mendocino/acpi/mmio.asl @@ -327,7 +327,11 @@ Device (I2C2) { Device (I2C3) { +#if CONFIG(SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP) + Name (_HID, "AMDI0019") +#else Name (_HID, "AMDI0010") +#endif Name (_UID, 0x3) Method (_CRS, 0) { Local0 = ResourceTemplate() { @@ -358,7 +362,10 @@ Device (I2C3) Return (0x0F) } +/* If this device is shared with PSP, then PSP takes care of power management */ +#if !CONFIG(SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP) AOAC_DEVICE(FCH_AOAC_DEV_I2C3, 0) +#endif } Device (MISC) -- cgit v1.2.3