From bbf91af9a22ad375e424c40e12f6807fcaf6965c Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Wed, 6 Sep 2017 11:37:46 -0600 Subject: amd/stoneyridge: Remove EXT_CONF_SUPPORT check The EXT_CONF_SUPPORT symbol doesn't exist for the Stoney Ridge SoC. Clean up northbridge.c by removing the check for the config value set. Remove the CPU initialization code that clears the EnableCf8ExtCfg bit. The location where it was set was removed in c1d72942 Disable PCI_CFG_EXT_IO BUG=b:66202622 Change-Id: Ic58c47fc5f568d17f5027c96d4152b0e5b3e1d14 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/21497 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel --- src/soc/amd/stoneyridge/model_15_init.c | 5 ----- src/soc/amd/stoneyridge/northbridge.c | 4 ---- 2 files changed, 9 deletions(-) (limited to 'src/soc/amd/stoneyridge') diff --git a/src/soc/amd/stoneyridge/model_15_init.c b/src/soc/amd/stoneyridge/model_15_init.c index 7dfcdb81f1..e89671821d 100644 --- a/src/soc/amd/stoneyridge/model_15_init.c +++ b/src/soc/amd/stoneyridge/model_15_init.c @@ -71,11 +71,6 @@ static void model_15_init(device_t dev) /* Enable the local CPU APICs */ setup_lapic(); - /* DisableCf8ExtCfg */ - msr = rdmsr(NB_CFG_MSR); - msr.hi &= ~(1 << (46 - 32)); - wrmsr(NB_CFG_MSR, msr); - /* Write protect SMM space with SMMLOCK. */ msr = rdmsr(HWCR_MSR); msr.lo |= (1 << 0); diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 922342971c..16cda01cf2 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -44,10 +44,6 @@ #include #include -#if IS_ENABLED(CONFIG_EXT_CONF_SUPPORT) -#error CONFIG_EXT_CONF_SUPPORT == 1 not support anymore! -#endif - typedef struct dram_base_mask { u32 base; /* [47:27] at [28:8] */ u32 mask; /* [47:27] at [28:8] and enable at bit 0 */ -- cgit v1.2.3