From b74975e40364ce3b66bda54167ca20cdf6cbda35 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 13 Jul 2020 01:12:57 +0200 Subject: soc/amd/stoneyridge: Select HAVE_CF9_RESET Looks like some preparation is needed before reset. However, Picasso also needs some special handling and still selects this option without selecting HAVE_CF9_RESET_PREPARE. So, just add HAVE_CF9_RESET for now. Change-Id: I0c6da9a43a28dbee916fd6bda9ae380ebd619edf Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43388 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/amd/stoneyridge') diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index f093e28670..b29bd990db 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -20,6 +20,7 @@ config CPU_SPECIFIC_OPTIONS select GENERIC_GPIO_LIB select GENERIC_UDELAY select IOAPIC + select HAVE_CF9_RESET select HAVE_USBDEBUG_OPTIONS select SOC_AMD_COMMON_BLOCK_SPI select TSC_SYNC_LFENCE -- cgit v1.2.3