From af17f0b7ce06f98586d31d1a2a50fb4fbc9cffd7 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 2 Mar 2022 23:36:55 +0100 Subject: soc/amd/*/northbridge,root_complex: add comment about PCI BARs Add a comment to point out that the read_resources functions aren't missing a pci_dev_read_resources call that would add the resources for the BARs of the PC device. Signed-off-by: Felix Held Change-Id: Ie480832e0d7954135d2171dda986e477ef7b6c09 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62547 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/soc/amd/stoneyridge/northbridge.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/amd/stoneyridge') diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 0384e00b88..85ef19ef4d 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -60,6 +60,9 @@ static void read_resources(struct device *dev) unsigned int idx = 0; struct resource *res; + /* The northbridge has no PCI BARs implemented, so there's no need to call + pci_dev_read_resources for it */ + /* * This MMCONF resource must be reserved in the PCI domain. * It is not honored by the coreboot resource allocator if it is in -- cgit v1.2.3