From 7e75d1ad2615d6096f84b15e20508d60d393868d Mon Sep 17 00:00:00 2001 From: Felix Held Date: Mon, 29 Jul 2024 19:03:47 +0200 Subject: soc/amd/common/smi_util: add PSP SMI helper functions The PSP can send SMIs to the x86 side of the system. Add helper functions to configure and to reset the PSP SMI generation. Since Stoneyridge also selects SOC_AMD_COMMON_BLOCK_SMI, add the SMITRIG0_PSP define and rename SMITYPE_FCH_FAKE0 to SMITYPE_PSP in its SoC-specific smi.h to bring it in line with the newer SoCs. This patch is split out from CB:65523. Signed-off-by: Felix Held Signed-off-by: Ritul Guru Change-Id: I525a447c9a75fdb95b9750e85a02896056315edf Reviewed-on: https://review.coreboot.org/c/coreboot/+/83702 Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/include/soc/smi.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/soc/amd/stoneyridge') diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h index ccdd3c5581..2a847aa104 100644 --- a/src/soc/amd/stoneyridge/include/soc/smi.h +++ b/src/soc/amd/stoneyridge/include/soc/smi.h @@ -71,7 +71,7 @@ #define SMITYPE_ESPI_SYS 26 #define SMITYPE_ESPI_WAKE_PME 27 /* 28-32 Reserved */ -#define SMITYPE_FCH_FAKE0 33 +#define SMITYPE_PSP 33 #define SMITYPE_FCH_FAKE1 34 #define SMITYPE_FCH_FAKE2 35 /* 36 Reserved */ @@ -163,6 +163,7 @@ #define SMI_TIMER_EN (1 << 15) #define SMI_REG_SMITRIG0 0x98 +# define SMITRIG0_PSP BIT(25) # define SMITRG0_EOS BIT(28) # define SMI_TIMER_SEL BIT(29) # define SMITRG0_SMIENB BIT(31) -- cgit v1.2.3