From 6e512c4d7a4faa68bf64b37c68bae8141d9e4518 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 14 Jun 2018 06:57:05 +0300 Subject: soc/amd/common: Introduce agesa_execute_state() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Each entrypoint to AGESA goes through the same sequence and have same the function signature. To avoid introducing bunch of preprocessor magic, rename all the agesawrapper_amdXXX() functions that are actual entrypoints to AGESA API, make them static, and provide a single exposed entry function agesa_execute_state(). Change-Id: I96ae1874132da3843aa42c2f4e8a59ec771d3893 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/31483 Reviewed-by: Arthur Heymans Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/chip.c | 5 ++--- src/soc/amd/stoneyridge/northbridge.c | 2 +- src/soc/amd/stoneyridge/romstage.c | 8 ++++---- 3 files changed, 7 insertions(+), 8 deletions(-) (limited to 'src/soc/amd/stoneyridge') diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c index 1bd8cbf2f8..033af6ec21 100644 --- a/src/soc/amd/stoneyridge/chip.c +++ b/src/soc/amd/stoneyridge/chip.c @@ -163,12 +163,11 @@ static void earliest_ramstage(void *unused) psp_load_named_blob(MBOX_BIOS_CMD_SMU_FW2, "smu_fw2"); post_code(0x47); - do_agesawrapper(agesawrapper_amdinitenv, "amdinitenv"); + do_agesawrapper(AMD_INIT_ENV, "amdinitenv"); } else { /* Complete the initial system restoration */ post_code(0x46); - do_agesawrapper(agesawrapper_amds3laterestore, - "amds3laterestore"); + do_agesawrapper(AMD_S3LATE_RESTORE, "amds3laterestore"); } } diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 927cce0c1f..9380d1f945 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -391,7 +391,7 @@ void domain_enable_resources(struct device *dev) { /* Must be called after PCI enumeration and resource allocation */ if (!romstage_handoff_is_resume()) - do_agesawrapper(agesawrapper_amdinitmid, "amdinitmid"); + do_agesawrapper(AMD_INIT_MID, "amdinitmid"); } void domain_set_resources(struct device *dev) diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index f2263b7aa9..92922c0662 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -65,11 +65,11 @@ static void load_smu_fw1(void) static void agesa_call(void) { post_code(0x37); - do_agesawrapper(agesawrapper_amdinitreset, "amdinitreset"); + do_agesawrapper(AMD_INIT_RESET, "amdinitreset"); post_code(0x38); /* APs will not exit amdinitearly */ - do_agesawrapper(agesawrapper_amdinitearly, "amdinitearly"); + do_agesawrapper(AMD_INIT_EARLY, "amdinitearly"); } static void bsp_agesa_call(void) @@ -102,7 +102,7 @@ asmlinkage void car_stage_entry(void) if (!s3_resume) { post_code(0x40); - do_agesawrapper(agesawrapper_amdinitpost, "amdinitpost"); + do_agesawrapper(AMD_INIT_POST, "amdinitpost"); post_code(0x41); /* @@ -137,7 +137,7 @@ asmlinkage void car_stage_entry(void) } else { printk(BIOS_INFO, "S3 detected\n"); post_code(0x60); - do_agesawrapper(agesawrapper_amdinitresume, "amdinitresume"); + do_agesawrapper(AMD_INIT_RESUME, "amdinitresume"); post_code(0x61); } -- cgit v1.2.3