From 6ab5ed3b66fc215d0d03b19ab02fdcf8613c7d09 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Wed, 29 May 2019 09:24:18 -0600 Subject: soc/amd/stoneyridge: Move LPC support to common AMD devices traditionally have the LPC-ISA bus at 14.3 and the definition has been very consistent. Relocate the feature from stoneyridge into common/block. BUG=b:131682806 Change-Id: I8d7175b8642bb17533bb2287b3e3ee3d52e85a75 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/c/coreboot/+/32653 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/spi.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'src/soc/amd/stoneyridge/spi.c') diff --git a/src/soc/amd/stoneyridge/spi.c b/src/soc/amd/stoneyridge/spi.c index c682d980bb..8abfa160f4 100644 --- a/src/soc/amd/stoneyridge/spi.c +++ b/src/soc/amd/stoneyridge/spi.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #define SPI_DEBUG_DRIVER CONFIG(DEBUG_SPI_FLASH) @@ -103,11 +104,7 @@ static int execute_command(void) void spi_init(void) { - uintptr_t bar; - - bar = pci_read_config32(SOC_LPC_DEV, SPIROM_BASE_ADDRESS_REGISTER); - bar = ALIGN_DOWN(bar, 64); - set_spibar(bar); + set_spibar(lpc_get_spibase()); } static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout, -- cgit v1.2.3