From 021c621eb0c8b21a34902519da595df94a973414 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 26 Jan 2021 11:28:47 +0200 Subject: soc/amd/stoneyridge: Create chipset_power_state in romstage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move chipset_power_state initialisation from early ramstage to romstage cbmem hook, like everyone else does. Change-Id: Ib9189a70996ac6cf4515a0d504eb687941a6b5e0 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/50295 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held Reviewed-by: Angel Pons --- src/soc/amd/stoneyridge/southbridge.c | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'src/soc/amd/stoneyridge/southbridge.c') diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 2a78ff9650..c53bcf05a5 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -404,17 +404,7 @@ static void fch_init_acpi_ports(void) void fch_init(void *chip_info) { - struct chipset_power_state *state; - fch_init_acpi_ports(); - - state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state)); - if (state) { - acpi_fill_pm_gpe_state(&state->gpe_state); - acpi_pm_gpe_add_events_print_events(); - } - - acpi_clear_pm_gpe_status(); } static void set_sb_aoac(struct aoac_devs *aoac) -- cgit v1.2.3