From eecb794c96f738d20bf4d5890bbad8b3834c9685 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Thu, 28 Sep 2017 17:32:30 -0600 Subject: amd/stoneyridge: Move pm/smi_read/write functions to util file Pull all pm_read and write, smi_read and write variants into a single file. Change-Id: I87d17361f923a60c95ab66e150445a6a0431b772 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/21759 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Martin Roth Reviewed-by: Marc Jones --- src/soc/amd/stoneyridge/sb_util.c | 66 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 src/soc/amd/stoneyridge/sb_util.c (limited to 'src/soc/amd/stoneyridge/sb_util.c') diff --git a/src/soc/amd/stoneyridge/sb_util.c b/src/soc/amd/stoneyridge/sb_util.c new file mode 100644 index 0000000000..87bff70321 --- /dev/null +++ b/src/soc/amd/stoneyridge/sb_util.c @@ -0,0 +1,66 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +void pm_write8(u8 reg, u8 value) +{ + write8((void *)(PM_MMIO_BASE + reg), value); +} + +u8 pm_read8(u8 reg) +{ + return read8((void *)(PM_MMIO_BASE + reg)); +} + +void pm_write16(u8 reg, u16 value) +{ + write16((void *)(PM_MMIO_BASE + reg), value); +} + +u16 pm_read16(u8 reg) +{ + return read16((void *)(PM_MMIO_BASE + reg)); +} + +void pm_write32(u8 reg, u32 value) +{ + write32((void *)(PM_MMIO_BASE + reg), value); +} + +u32 pm_read32(u8 reg) +{ + return read32((void *)(PM_MMIO_BASE + reg)); +} + +void smi_write32(uint8_t offset, uint32_t value) +{ + write32((void *)(APU_SMI_BASE + offset), value); +} + +uint32_t smi_read32(uint8_t offset) +{ + return read32((void *)(APU_SMI_BASE + offset)); +} + +uint16_t smi_read16(uint8_t offset) +{ + return read16((void *)(APU_SMI_BASE + offset)); +} + +void smi_write16(uint8_t offset, uint16_t value) +{ + write16((void *)(APU_SMI_BASE + offset), value); +} -- cgit v1.2.3