From 0801b335dd11f7827b6c0164f06d75e7a94fff1e Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Fri, 25 Aug 2017 15:29:45 -0600 Subject: amd/stoneyridge: Make cbmem_top SMM aware Make the default for SMM_TSEG_SIZE depend on SMM_TSEG in addition to HAVE_SMI_HANDLER. Change the value returned by cbmem_top() to carve out a range to be used by TSEG. The SMM Mask register has a granularity of 128KB but align the value to 16MB to keep down the number of variable MTRRs required. Change-Id: I54ffc10108862b7d022fbbd92bf97525b349df27 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/21491 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/ramtop.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/soc/amd/stoneyridge/ramtop.c') diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c index c81e73b4e1..bdad8d6057 100644 --- a/src/soc/amd/stoneyridge/ramtop.c +++ b/src/soc/amd/stoneyridge/ramtop.c @@ -41,5 +41,7 @@ void *cbmem_top(void) if (!tom.lo) return 0; else - return (void *)restore_top_of_low_cacheable(); + /* 16MB alignment to keep MTRR usage low */ + return (void *)ALIGN_DOWN(restore_top_of_low_cacheable() + - CONFIG_SMM_TSEG_SIZE, 16*MiB); } -- cgit v1.2.3