From 93459d6278f1557f3e38c33b79a8fd739aa7ff68 Mon Sep 17 00:00:00 2001 From: Richard Spiegel Date: Wed, 16 May 2018 14:08:33 -0700 Subject: soc/amd/stoneyridge/acpi.c: Create GPIO acpigen procedures There are some acpigen functionality that have not been implemented. They are defined as week within acpigen.c, in order to not break the build. This adds stoneyridge specific versions. BUG=b:79546790 TEST=Build grunt with added debug code to gpio_lib.asl. Boot to OS, activate ACPI debug, activate S3 stress test. Interrupt stress test, do a "cat /var/log/messages" saving the serial output. Examine the serial output, see added debug code showing action taken. Confirm action by reading proper register. Debug code removed. Change-Id: I9062d889f828a3175b89e6f4a3659ebbf90eac68 Signed-off-by: Richard Spiegel Reviewed-on: https://review.coreboot.org/26335 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/amd/stoneyridge/include/soc/gpio.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/soc/amd/stoneyridge/include') diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h index 6133bf1684..6e722933b8 100644 --- a/src/soc/amd/stoneyridge/include/soc/gpio.h +++ b/src/soc/amd/stoneyridge/include/soc/gpio.h @@ -36,6 +36,10 @@ struct soc_amd_event { uint8_t event; }; +#define GPIO_TOTAL_PINS 149 +#define GPIO_PIN_IN (1 << 0) /* for byte access */ +#define GPIO_PIN_OUT (1 << 6) /* for byte access */ + #define GPIO_EDGE_TRIG (0 << 8) #define GPIO_LEVEL_TRIG (1 << 8) #define GPIO_TRIGGER_MASK (1 << 8) @@ -555,6 +559,8 @@ enum { .flags = GPIO_FLAG_DEBOUNCE } typedef uint32_t gpio_t; +/* Get the address of the control register of a particular pin */ +uintptr_t gpio_get_address(gpio_t gpio_num); /** * @brief program a particular set of GPIO -- cgit v1.2.3