From 6dfbb593077ea3edb9162431c2380a268d35fc4a Mon Sep 17 00:00:00 2001 From: Richard Spiegel Date: Thu, 15 Mar 2018 15:45:44 -0700 Subject: soc/amd/stoneyridge/southbridge.c: Remove configure_stoneyridge_uart The GPIO programming of configure_stoneyridge_UART() can be done by the early GPIO table, AOAC enabling was already removed. So configure_stoneyridge_uart() became redundant. Remove procedure configure_stoneyridge_uart(). BUG=b:74258015 TEST=Build and boot kahlee, observing serial output does not changes from previous serial output. Change-Id: Ie67051d7b90fa294090f6bfc518c6c074d98cc98 Signed-off-by: Richard Spiegel Reviewed-on: https://review.coreboot.org/25192 Reviewed-by: Garrett Kirkendall Reviewed-by: Martin Roth Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/include/soc/southbridge.h | 1 - 1 file changed, 1 deletion(-) (limited to 'src/soc/amd/stoneyridge/include') diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 6dea0c6864..bdcb38fa8d 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -353,7 +353,6 @@ struct stoneyridge_aoac { void enable_aoac_devices(void); void sb_enable_rom(void); -void configure_stoneyridge_uart(void); void configure_stoneyridge_i2c(void); void sb_clk_output_48Mhz(void); void sb_disable_4dw_burst(void); -- cgit v1.2.3