From 22f54c5a81bf387edcd7ea792bc1717c554054c6 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Wed, 29 Nov 2017 09:30:23 -0700 Subject: amd/stoneyridge: Add NV storage to ramtop The scratch registers in northbridge used for storing the top of cacheable memory are volatile. Use the BiosRam storage in the FCH instead. TEST=Suspend and resume Kahlee with complete S3 patch stack BUG=b:69614064 Change-Id: Ieb3cfd173c70bf899a6391d62d1df87b38485f30 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/22726 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/include/soc/iomap.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/amd/stoneyridge/include') diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h index ccedcce7b4..2319b883d7 100644 --- a/src/soc/amd/stoneyridge/include/soc/iomap.h +++ b/src/soc/amd/stoneyridge/include/soc/iomap.h @@ -66,4 +66,7 @@ #define AMD_GPIO_MUX (AMD_SB_ACPI_MMIO_ADDR + 0x00000d00) #define AMD_GPIO_CONTROL (AMD_SB_ACPI_MMIO_ADDR + 0x00001500) +/* BiosRam Ranges at 0xfed80500 or I/O 0xcd4/0xcd5 */ +#define BIOSRAM_CBMEM_TOP 0xf0 /* 4 bytes */ + #endif /* __SOC_STONEYRIDGE_IOMAP_H__ */ -- cgit v1.2.3