From 1d9a46ba9a289691325d2dece09c3d4ebd15439a Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Wed, 26 Sep 2018 16:23:41 -0600 Subject: amd/stoneyridge: Load AOAC and USB gnvs values Indicate the devices that are enabled. This is somewhat rudimentary, but could be improved in a later patch (e.g. get settings from devicetree). Calculate values that may be used for reinitializing the xHCI firmware. Add the EHCI BAR's current base address to gnvs. BUG=b:77602074 Change-Id: I8af69c030eb2353ad75beeb2bfd3bef24abff04c Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/28767 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/include/soc/southbridge.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/soc/amd/stoneyridge/include') diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index c54a7d43cc..a3c4c7ca8d 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -429,6 +429,11 @@ struct soc_power_reg { uint16_t wake_from; }; +#define XHCI_FW_SIG_OFFSET 0xc +#define XHCI_FW_ADDR_OFFSET 0x6 +#define XHCI_FW_SIZE_OFFSET 0x8 +#define XHCI_FW_BOOTRAM_SIZE 0x8000 + void enable_aoac_devices(void); void sb_enable_rom(void); void configure_stoneyridge_i2c(void); -- cgit v1.2.3