From 949d666b5cffcdb16c3aaa06092e1b38ae27955c Mon Sep 17 00:00:00 2001 From: Justin TerAvest Date: Wed, 24 Jan 2018 14:20:03 -0700 Subject: src/amd/stoneyridge: Add devicetree ACPI names This commit adds device name to ACPI name bindings for various entries in the devicetree. BUG=b:72121803 Change-Id: I5564e4a7e56fdd1bc9f34497bdb78383093a2ba3 Signed-off-by: Justin TerAvest Reviewed-on: https://review.coreboot.org/23417 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/chip.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'src/soc/amd/stoneyridge/chip.c') diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c index 3d82c37099..d447ffa8ab 100644 --- a/src/soc/amd/stoneyridge/chip.c +++ b/src/soc/amd/stoneyridge/chip.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -35,12 +36,38 @@ struct device_operations cpu_bus_ops = { .acpi_fill_ssdt_generator = generate_cpu_entries, }; +static const char *soc_acpi_name(const struct device *dev) +{ + if (dev->path.type == DEVICE_PATH_DOMAIN) + return "PCI0"; + if (dev->path.type != DEVICE_PATH_PCI) + return NULL; + + switch (dev->path.pci.devfn) { + case EHCI1_DEVFN: + return "EHC0"; + case LPC_DEVFN: + return "LPCB"; + case SATA_DEVFN: + return "STCR"; + case SD_DEVFN: + return "SDCN"; + case SMBUS_DEVFN: + return "SBUS"; + case XHCI_DEVFN: + return "XHC0"; + default: + return NULL; + } +}; + struct device_operations pci_domain_ops = { .read_resources = domain_read_resources, .set_resources = domain_set_resources, .enable_resources = domain_enable_resources, .scan_bus = pci_domain_scan_bus, .ops_pci_bus = pci_bus_default_ops, + .acpi_name = soc_acpi_name, }; static void enable_dev(device_t dev) -- cgit v1.2.3