From 8f2a7e073bab420969f9390b44d64459ad7268ce Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Wed, 1 Nov 2017 11:44:48 -0600 Subject: amd/stoneyridge: Add S3 support to POST Add/update the romstage and ramstage paths to check for S3 resume and call the appropriate AGESA functions. TEST=Suspend/Resume Kahlee with full S3 patch stack BUG=b:69614064 Change-Id: Ie6ae66f88b888fff3a800b4ed55dd1f6fed712b2 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/22731 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/chip.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) (limited to 'src/soc/amd/stoneyridge/chip.c') diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c index d3a8bc4044..f5efcfd96f 100644 --- a/src/soc/amd/stoneyridge/chip.c +++ b/src/soc/amd/stoneyridge/chip.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -110,12 +111,19 @@ struct chip_operations soc_amd_stoneyridge_ops = { static void earliest_ramstage(void *unused) { - post_code(0x46); - if (IS_ENABLED(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW)) - psp_load_named_blob(MBOX_BIOS_CMD_SMU_FW2, "smu_fw2"); + if (!romstage_handoff_is_resume()) { + post_code(0x46); + if (IS_ENABLED(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW)) + psp_load_named_blob(MBOX_BIOS_CMD_SMU_FW2, "smu_fw2"); - post_code(0x47); - do_agesawrapper(agesawrapper_amdinitenv, "amdinitenv"); + post_code(0x47); + do_agesawrapper(agesawrapper_amdinitenv, "amdinitenv"); + } else { + /* Complete the initial system restoration */ + post_code(0x46); + do_agesawrapper(agesawrapper_amds3laterestore, + "amds3laterestore"); + } } BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, earliest_ramstage, NULL); -- cgit v1.2.3