From 154239aff1602e0ae27f9ce1f2df0647e4aef0a8 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Thu, 2 Nov 2017 09:49:30 -0600 Subject: amd/stoneyridge: Remove fixme.c Move the two functions in fixme.c to places where they make more sense. Coincidentally fix the todo in amd_initcpuio() and use bsp_topmem() instead of explicitely reading the MSR. BUG=b:62241048 Change-Id: Ica80b92f48788314ad290ccf72e6847fb6d039c3 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/22297 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/bootblock/bootblock.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'src/soc/amd/stoneyridge/bootblock') diff --git a/src/soc/amd/stoneyridge/bootblock/bootblock.c b/src/soc/amd/stoneyridge/bootblock/bootblock.c index 1712b5159a..461f32dbff 100644 --- a/src/soc/amd/stoneyridge/bootblock/bootblock.c +++ b/src/soc/amd/stoneyridge/bootblock/bootblock.c @@ -17,6 +17,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -37,6 +40,26 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp) bootblock_main_with_timestamp(base_timestamp); } +/* Set the MMIO Configuration Base Address and Bus Range. */ +static void amd_initmmio(void) +{ + msr_t mmconf; + msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR); + int mtrr; + + mmconf.hi = 0; + mmconf.lo = CONFIG_MMCONF_BASE_ADDRESS | MMIO_RANGE_EN + | fms(CONFIG_MMCONF_BUS_NUMBER) << MMIO_BUS_RANGE_SHIFT; + wrmsr(MMIO_CONF_BASE, mmconf); + + /* + * todo: AGESA currently writes variable MTRRs. Once that is + * corrected, un-hardcode this MTRR. + */ + mtrr = (mtrr_cap.lo & MTRR_CAP_VCNT) - 2; + set_var_mtrr(mtrr, FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT); +} + void bootblock_soc_early_init(void) { amd_initmmio(); -- cgit v1.2.3