From 6dcb6c2fa400495df97aa2e95a1897cd4b05a1a8 Mon Sep 17 00:00:00 2001
From: Marc Jones <marcj303@gmail.com>
Date: Thu, 26 Jul 2018 17:07:13 -0600
Subject: soc/amd/stoneyridge: Add IGFX device ACPI ASL entry

Add internal graphics device 00.01.00 to the ACPI tables so that the
ACPI PCI option ROM save functions have a proper scope to save the
ROM to.

BUG=b:111697181
TEST=Check coreboot log doesn't have "PCI: 00:01.0: Missing ACPI scope"
and check _ROM method is added in the SSDT1.

Change-Id: I2c9ef8d9dff76805b1fcde2ccceef958a5b53b4f
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/27653
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
---
 src/soc/amd/stoneyridge/acpi/northbridge.asl | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'src/soc/amd/stoneyridge/acpi')

diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl
index 4df6567e2c..fe78534403 100644
--- a/src/soc/amd/stoneyridge/acpi/northbridge.asl
+++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl
@@ -46,6 +46,11 @@ Device(AMRT) {
 	Name(_ADR, 0x00000000)
 } /* end AMRT */
 
+/* Internal Graphics */
+Device(IGFX) {
+	Name(_ADR, 0x00010000)
+}
+
 /* Gpp 0 */
 Device(PBR4) {
 	Name(_ADR, 0x00020001)
-- 
cgit v1.2.3