From 5e2d9c0979696e63822854432cd37e9ea2189e99 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 20 Jan 2023 19:57:40 +0100 Subject: soc/amd/stoneyridge: clean up global NVS Remove the unused fields that were previously used for PCNT and PWRS. The LIDS field is only used in the ACPI code, but keep if for now, since it would require a bigger rework to remove it from the global NVS. Signed-off-by: Felix Held Change-Id: I6b172214998818f841f5694f47815eddfaf9deaa Reviewed-on: https://review.coreboot.org/c/coreboot/+/72139 Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/acpi/globalnvs.asl | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) (limited to 'src/soc/amd/stoneyridge/acpi/globalnvs.asl') diff --git a/src/soc/amd/stoneyridge/acpi/globalnvs.asl b/src/soc/amd/stoneyridge/acpi/globalnvs.asl index e60789ec84..703e16f58c 100644 --- a/src/soc/amd/stoneyridge/acpi/globalnvs.asl +++ b/src/soc/amd/stoneyridge/acpi/globalnvs.asl @@ -9,15 +9,13 @@ Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ - , 8, // 0x00 - Processor Count - LIDS, 8, // 0x01 - LID State - , 8, // 0x02 - AC Power State - CBMC, 32, // 0x03 - 0x06 - coreboot Memory Console - PM1I, 64, // 0x07 - 0x0e - System Wake Source - PM1 Index - GPEI, 64, // 0x0f - 0x16 - GPE Wake Source - TMPS, 8, // 0x17 - Temperature Sensor ID - TCRT, 8, // 0x18 - Critical Threshold - TPSV, 8, // 0x19 - Passive Threshold + LIDS, 8, // 0x00 - LID State + CBMC, 32, // 0x01 - 0x04 - coreboot Memory Console + PM1I, 64, // 0x05 - 0x0c - System Wake Source - PM1 Index + GPEI, 64, // 0x0d - 0x14 - GPE Wake Source + TMPS, 8, // 0x15 - Temperature Sensor ID + TCRT, 8, // 0x16 - Critical Threshold + TPSV, 8, // 0x17 - Passive Threshold Offset (0x20), // 0x20 - AOAC Device Enables , 5, IC0E, 1, // I2C0, 5 -- cgit v1.2.3