From 257db58bdb06994e6082afff047e1a3d2ad8fe9a Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Sun, 18 Jun 2017 17:33:30 -0600 Subject: soc/amd/stoneyridge: Add GNVS Add ACPI asl for global non-volatile storage (GNVS). Change-Id: I9ecab92181bfe60e7b6c6e91ffb9fa843345352f Signed-off-by: Marc Jones Reviewed-on: https://review.coreboot.org/20275 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/amd/stoneyridge/Makefile.inc') diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 416d4bdacf..f3c2b1b5d9 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -61,7 +61,7 @@ verstage-y += tsc_freq.c ramstage-y += chip.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c -ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-y += fixme.c ramstage-y += gpio.c ramstage-y += hda.c -- cgit v1.2.3