From 0990fbf2d9b8a0070866788b185bdd4bf6e5537e Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Fri, 15 Sep 2017 15:23:04 -0600 Subject: vboot: reset vbnv in cmos when cmos failure occurs There's an occasional issue on machines which use CMOS for their vbnv storage. The machine that just powers up from complete G3 would have had their RTC rail not held up. The contents of vbnv in CMOS could pass the crc8 though the values could be bad. In order to fix this introduce two functions: 1. vbnv_init_cmos() 2. vbnv_cmos_failed() At the start of vboot the CMOS is queried for failure. If there is a failure indicated then the vbnv data is restored from flash backup or reset to known values when there is no flash backup. BUG=b:63054105 Change-Id: I8bd6f28f64a116b84a08ce4779cd4dc73c0f2f3d Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/21560 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner Reviewed-by: Furquan Shaikh --- src/soc/amd/stoneyridge/Makefile.inc | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/amd/stoneyridge/Makefile.inc') diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index b6669f1cef..06d9f5820d 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -41,6 +41,7 @@ bootblock-$(CONFIG_STONEYRIDGE_UART) += uart.c bootblock-y += fixme.c bootblock-y += bootblock/bootblock.c bootblock-y += early_setup.c +bootblock-y += pmutil.c bootblock-y += tsc_freq.c romstage-y += romstage.c @@ -50,12 +51,14 @@ romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c romstage-y += fixme.c romstage-y += gpio.c romstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c +romstage-y += pmutil.c romstage-y += smbus.c romstage-y += smbus_spd.c romstage-y += ramtop.c romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c romstage-y += tsc_freq.c +verstage-y += pmutil.c verstage-y += reset.c verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c verstage-y += tsc_freq.c @@ -71,6 +74,7 @@ ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c ramstage-y += lpc.c ramstage-y += model_15_init.c ramstage-y += northbridge.c +ramstage-y += pmutil.c ramstage-y += reset.c ramstage-y += sata.c ramstage-y += sm.c -- cgit v1.2.3