From dd7ec09155c8aaa527d070309a8439bff87d2985 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Mon, 23 May 2022 16:06:06 +0200
Subject: soc/amd/stoneyridge: Move BERT into a cbmem region

This removes the need to align BERT so that TSEG remains aligned.

Change-Id: I21b55a87838dcb4bd4099f051ba0a011a4d41eea
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64601
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/soc/amd/stoneyridge/Kconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

(limited to 'src/soc/amd/stoneyridge/Kconfig')

diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 7bc5ad9c55..0127ac3cec 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -373,4 +373,12 @@ config DISABLE_KEYBOARD_RESET_PIN
 	  functionality isn't disabled, configuring it as an output and driving
 	  it as 0 will cause a reset.
 
+config ACPI_BERT_SIZE
+	hex
+	default 0x100000 if ACPI_BERT
+	default 0x0
+	help
+	  Specify the amount of DRAM reserved for gathering the data used to
+	  generate the ACPI table.
+
 endif # SOC_AMD_STONEYRIDGE
-- 
cgit v1.2.3