From 3c0c3619bcd0c6d25bdf5492be6ba8bb2d5bb410 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sun, 23 Dec 2018 07:43:01 +0200
Subject: arch/x86: SSE2 implies SSE support
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Change-Id: Ic9ffcfadd0cd41bb033ed2aec9fb98009dd62383
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30394
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
---
 src/soc/amd/stoneyridge/Kconfig | 1 -
 1 file changed, 1 deletion(-)

(limited to 'src/soc/amd/stoneyridge/Kconfig')

diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 529d651243..03a40cc6ea 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -62,7 +62,6 @@ config CPU_SPECIFIC_OPTIONS
 	select SMM_TSEG
 	select POSTCAR_STAGE
 	select POSTCAR_CONSOLE
-	select SSE
 	select SSE2
 	select RTC
 	select SOC_AMD_PSP_SELECTABLE_SMU_FW
-- 
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