From bb42f67240c7d69a8784a03565da1239908fe402 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 2 Feb 2022 20:52:54 +0100 Subject: soc/amd/*/i2c: introduce and use MISC_I2C_PAD_CTRL(bus) macro Signed-off-by: Felix Held Change-Id: I9d098a55a5c6f6e022c3896750c752e2759e101b Reviewed-on: https://review.coreboot.org/c/coreboot/+/61567 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/soc/amd/sabrina/include/soc/southbridge.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/amd/sabrina/include') diff --git a/src/soc/amd/sabrina/include/soc/southbridge.h b/src/soc/amd/sabrina/include/soc/southbridge.h index 7b5644b7b2..e85a052a3a 100644 --- a/src/soc/amd/sabrina/include/soc/southbridge.h +++ b/src/soc/amd/sabrina/include/soc/southbridge.h @@ -117,6 +117,7 @@ #define MISC_I2C1_PAD_CTRL 0xdc #define MISC_I2C2_PAD_CTRL 0xe0 #define MISC_I2C3_PAD_CTRL 0xe4 +#define MISC_I2C_PAD_CTRL(bus) (MISC_I2C0_PAD_CTRL + 4 * (bus)) #define I2C_PAD_CTRL_NG_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) #define I2C_PAD_CTRL_NG_NORMAL 0xc #define I2C_PAD_CTRL_RX_SEL_MASK (BIT(4) | BIT(5)) -- cgit v1.2.3