From b1fe9de74d420cf7193135c2b6d034bf06dabe94 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 12 Jan 2022 23:18:54 +0100 Subject: soc/amd/sabrina: add additional UART controllers Compared to Cezanne there are 3 more UART controllers. Revision 1.50 of the PPR #57243 was used as a reference. Signed-off-by: Felix Held Change-Id: I628b1a7a0930f3409acdcabda2b864d42bf6bd23 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61086 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson Reviewed-by: Jason Glenesk --- src/soc/amd/sabrina/chipset.cb | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/amd/sabrina/chipset.cb') diff --git a/src/soc/amd/sabrina/chipset.cb b/src/soc/amd/sabrina/chipset.cb index 486f42fb5c..8c6fab96c5 100644 --- a/src/soc/amd/sabrina/chipset.cb +++ b/src/soc/amd/sabrina/chipset.cb @@ -110,5 +110,8 @@ chip soc/amd/sabrina device mmio 0xfedc5000 alias i2c_3 off end device mmio 0xfedc9000 alias uart_0 off end device mmio 0xfedca000 alias uart_1 off end + device mmio 0xfedce000 alias uart_2 off end + device mmio 0xfedcf000 alias uart_3 off end + device mmio 0xfedd1000 alias uart_4 off end device mmio 0xfedd5000 alias emmc off end end -- cgit v1.2.3