From fdb07582567414f9e93c5dc0c24b2dce63485b14 Mon Sep 17 00:00:00 2001 From: Fred Reitberger Date: Fri, 15 Jul 2022 08:05:56 -0400 Subject: soc/amd/common/block/apob/apob_cache.c: Add assert for APOB DRAM size Add static check to ensure the reserved APOB DRAM space is the same size as the MRC_CACHE region specified in the fmap. Update sabrina APOB DRAM size to match the fmap. TEST: Timeless builds identical. Test build with a larger MRC_CACHE than APOB DRAM failed the assert as expected. Signed-off-by: Fred Reitberger Change-Id: Ia14f6ef94b9062df0612fe96098b1012085ccf9c Reviewed-on: https://review.coreboot.org/c/coreboot/+/65878 Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/soc/amd/sabrina/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/amd/sabrina/Kconfig') diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig index 62ae5989f9..997a1beadd 100644 --- a/src/soc/amd/sabrina/Kconfig +++ b/src/soc/amd/sabrina/Kconfig @@ -125,11 +125,11 @@ config PSP_APOB_DRAM_ADDRESS config PSP_APOB_DRAM_SIZE hex - default 0x20000 + default 0x1E000 config PSP_SHAREDMEM_BASE hex - default 0x2021000 if VBOOT + default 0x201F000 if VBOOT default 0x0 help This variable defines the base address in DRAM memory where PSP copies -- cgit v1.2.3