From f66e781336e992f0791480bd710ef32b71d4ad52 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 22 Jul 2021 17:38:27 +0200 Subject: soc/amd/picasso/fch: change sb prefix of sb_clk_output_48Mhz to fch Picasso has an integrated FCH and no south bridge, so change the sb prefix to fch. Signed-off-by: Felix Held Change-Id: I82aed68104ea9570827646c818e100bd7e04d1af Reviewed-on: https://review.coreboot.org/c/coreboot/+/56526 Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/fch.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/amd/picasso') diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index 58a5ce9165..0798e20c04 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -86,7 +86,7 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size) return irq_association; } -static void sb_clk_output_48Mhz(void) +static void fch_clk_output_48Mhz(void) { u32 ctrl; const struct soc_amd_picasso_config *cfg = config_of_soc(); @@ -231,7 +231,7 @@ void fch_init(void *chip_info) gpp_clk_setup(); - sb_clk_output_48Mhz(); + fch_clk_output_48Mhz(); sb_rfmux_config_override(); } -- cgit v1.2.3