From d560ad6e7a372c4e3d1c14d158ca9318c5b1ba90 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 24 Nov 2021 11:44:50 +0100 Subject: soc/amd/*/data_fabric: use DF_ prefix for bit and shift defines Adding the DP_ prefix to the defines for MMIO_NP, MMIO_WE and MMIO_RE clarifies the scope of those definitions. For consistency also add this prefix to MMIO_DST_FABRIC_ID_SHIFT. Signed-off-by: Felix Held Change-Id: I3a509ccc071aa51a67552fb9e7195358a76fe4dc Reviewed-on: https://review.coreboot.org/c/coreboot/+/59627 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson --- src/soc/amd/picasso/data_fabric.c | 6 +++--- src/soc/amd/picasso/include/soc/data_fabric.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc/amd/picasso') diff --git a/src/soc/amd/picasso/data_fabric.c b/src/soc/amd/picasso/data_fabric.c index b5949f028c..aec8a9e626 100644 --- a/src/soc/amd/picasso/data_fabric.c +++ b/src/soc/amd/picasso/data_fabric.c @@ -44,7 +44,7 @@ void data_fabric_set_mmio_np(void) for (i = 0; i < NUM_NB_MMIO_REGS; i++) { /* Adjust all registers that overlap */ ctrl = data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(i)); - if (!(ctrl & (MMIO_WE | MMIO_RE))) + if (!(ctrl & (DF_MMIO_WE | DF_MMIO_RE))) continue; /* not enabled */ base = data_fabric_broadcast_read32(0, NB_MMIO_BASE(i)); @@ -92,8 +92,8 @@ void data_fabric_set_mmio_np(void) data_fabric_broadcast_write32(0, NB_MMIO_BASE(reg), np_bot); data_fabric_broadcast_write32(0, NB_MMIO_LIMIT(reg), np_top); data_fabric_broadcast_write32(0, NB_MMIO_CONTROL(reg), - (IOMS0_FABRIC_ID << MMIO_DST_FABRIC_ID_SHIFT) | MMIO_NP | MMIO_WE - | MMIO_RE); + (IOMS0_FABRIC_ID << DF_MMIO_DST_FABRIC_ID_SHIFT) | DF_MMIO_NP + | DF_MMIO_WE | DF_MMIO_RE); data_fabric_print_mmio_conf(); } diff --git a/src/soc/amd/picasso/include/soc/data_fabric.h b/src/soc/amd/picasso/include/soc/data_fabric.h index d652d1957c..5533433126 100644 --- a/src/soc/amd/picasso/include/soc/data_fabric.h +++ b/src/soc/amd/picasso/include/soc/data_fabric.h @@ -8,7 +8,7 @@ /* D18F0 - Fabric Configuration registers */ /* SoC-specific bits in D18F0_MMIO_CTRL0 */ -#define MMIO_NP BIT(12) +#define DF_MMIO_NP BIT(12) #define IOMS0_FABRIC_ID 9 -- cgit v1.2.3